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CFDRC News!

Missile Defense Agency TechUpdate "Modeling the Real World"

CFDRC Wins a $5M Hydrogen Fuel Cell project from DoE

CFDRC Files Patent for "Advanced Multipurpose Pseudospark Switch"

CFDRC is awarded Patent for "Electrothermally Induced Flow for Mixing and Cleaning in Microsystems"

CFDRC Files Patent Application for "Synthesis of Carbon Nanotubes by Selectively Heating Catalyst"

CFDRC Files Patent Application for "Integrated Microfluidic System Design "

Mixed-Mode Simulation: Device + Circuit (SPICE)

CFDRC has developed a software coupling mechanism and procedures to enable 2D or 3D semiconductor device simulations (NanoTCAD solver) coupled with Berkeley SPICE circuit simulator. The coupling mechanism is illustrated below.

MixSpice is the controlling interface software between the NanoTCAD and SPICE3 programs. It starts instances of both solvers, coordinates information exchange between the two solvers, and controls the progress of the simulation based on the convergence criteria, tolerances, etc., specified in the input circuit (.cir) netlist file. The MixSPICE coupling is available for Steady and Transient NanoTCAD simulations.

The simulation proceeds as follows:

• MixSpice starts SPICE3 and NanoTCAD solvers. Only one instance of SPICE3 and one 3D-Device instance per A-type device in the SPICE netlist is used.
• The SPICE3 process is always started on the local machine, while NanoTCAD programs can be started locally or on remote servers.
• For every time step in a transient analysis (.TRAN), or DC operating point in a DC sweep point analysis (.DC), a Newton-Raphson iteration loop is run until convergence.

 

Application Examples

Illustration of a Mixed-Mode Simulation including SPICE circuit directly coupled with 3D semiconductor device model (nMOSFET) solved by CFDRC's NanoTCAD device simulator:

Analysis of space-radiation effect, single-event upset (SEU) in Static Random Access Memory (SRAM). This effect involves tight coupling of device and circuit response to incident-ionizing radiation.

In a mixed-mode simulation of the heavy-ion strike effect (single-event upset) in a static memory circuit, the struck transistor is modeled in the "device domain" (i.e., using 3-dimensional device simulation), while the rest of the memory cell is represented by a SPICE-like compact circuit model.

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